AS4C4M32S dram equivalent, 4m x 32 bit synchronous dram.
* Fast access time from clock: 5.4/5.4 ns
* Fast clock rate: 166/143 MHz
* Fully synchronous operation
* Internal pipelined architecture
* Four intern.
requiring high memory bandwidth.
Table 1. Key Specifications AS4C4M32S
tCK3 Clock Cycle time(min.) tAC3 Access time fro.
Table 1. Pin Details
Symbol Type Description
CLK Input Clock: CLK is driven by the system clock. All SDRAM input signals are sampled on the positive edge of CLK. CLK also increments the internal burst counter and controls the output registers.
C.
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